Enhanced VE TGP code via the nAst1 project

[RobertISaar]

this has been sitting on my desktop for far too long, no idea why i haven't uploaded it yet.

but, included is an enhanced BIN, XDF and ADX combo meant for 8F applications, i added in the proven 400-8400 VE tables from my nAst1 project over on the 60V6 boards to the TGP code that i built for a few specific applications that benefitted from the extra defintion it provided.

i got rid of the stupid VE adder table setup since it would be pointless for the range that can be dealt with now.

i recently had the request of adding in an idle VE table for the nAst1 project due to it being needed for some rather wicked N/A builds. if it becomes an issue for anyone here, i can add it to the 8F setup as well, would only take a few minutes to port it from A1 to 8F.

anyways, enjoy.  :icon_biggrin:

i'm not saying this will be a perfect tune out of the box, but i did fix a few factory errors along the way, so expect to tweak it for your application.

[GutlessSupreme]

hi Robert,

This code setup for a stock TGP build with an automatic, correct?

[RobertISaar]

yeah, it's a normal AZRC BIN with the enhanced VE patched in, and a couple of what i consider errors fixed.